diff options
author | Andreas Larsson <andreas@gaisler.com> | 2013-07-03 10:06:37 +0200 |
---|---|---|
committer | Andreas Larsson <andreas@gaisler.com> | 2014-01-27 10:21:14 +0100 |
commit | 3919da57616fa64df4ea9c51f3bcde1a6b1f8bfe (patch) | |
tree | 38243d6412952df2eb4f22e12d8c691ccb9bf132 | |
parent | 9f156a00bac098fea0d1df7d05e17ccccc22ed99 (diff) |
GRSPW: Fix incorrect register defines - presently functionally inconsequential
-rw-r--r-- | c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c index 3573812718..71b1fe6a78 100644 --- a/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c +++ b/c/src/lib/libbsp/sparc/shared/spw/grspw_pkt.c @@ -173,10 +173,10 @@ struct grspw_regs { #define GRSPW_DK_DESTKEY (0xff<<GRSPW_DK_DESTKEY_BIT) /* GRSPW - Time Register - 0x14 */ -#define GRSPW_TIME_CTRL_BIT 0 -#define GRSPW_TIME_CNT_BIT 6 -#define GRSPW_TIME_CTRL (0x3f<<GRSPW_TIME_CTRL_BIT) -#define GRSPW_TIME_TCNT (0x3<<GRSPW_TIME_CNT_BIT) +#define GRSPW_TIME_CTRL_BIT 6 +#define GRSPW_TIME_CNT_BIT 0 +#define GRSPW_TIME_CTRL (0x3<<GRSPW_TIME_CTRL_BIT) +#define GRSPW_TIME_TCNT (0x3f<<GRSPW_TIME_CNT_BIT) /* GRSPW - DMA Control Register - 0x20*N */ #define GRSPW_DMACTRL_LE_BIT 16 |