From bb65f4484f9be1818435ca39e95feab35be427aa Mon Sep 17 00:00:00 2001 From: Jiri Gaisler Date: Tue, 1 Dec 2020 13:34:02 +0100 Subject: Added emulation of GR740 SOC * Only limited functionality with standard peripherals --- Makefile.am | 2 +- Makefile.in | 7 +- configure | 20 ++--- configure.ac | 2 +- func.c | 2 +- gr740.c | 255 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ sis.c | 9 ++- sis.h | 4 + sis.info | 64 ++++++++++++--- sis.texi | 40 ++++++++++ version.texi | 8 +- 11 files changed, 379 insertions(+), 34 deletions(-) create mode 100644 gr740.c diff --git a/Makefile.am b/Makefile.am index a7c9c0d..384a58f 100644 --- a/Makefile.am +++ b/Makefile.am @@ -7,7 +7,7 @@ endif bin_PROGRAMS = sis sis_SOURCES = erc32.c grlib.c leon3.c exec.c func.c help.c \ sparc.c riscv.c leon2.c sis.c interf.c remote.c elf.c \ - greth.c tap.c \ + greth.c tap.c gr740.c \ $(LN_SRC) AM_CFLAGS = -DFAST_UART diff --git a/Makefile.in b/Makefile.in index 53b0a67..d11bca3 100644 --- a/Makefile.in +++ b/Makefile.in @@ -79,13 +79,13 @@ am__installdirs = "$(DESTDIR)$(bindir)" "$(DESTDIR)$(infodir)" PROGRAMS = $(bin_PROGRAMS) am__sis_SOURCES_DIST = erc32.c grlib.c leon3.c exec.c func.c help.c \ sparc.c riscv.c leon2.c sis.c interf.c remote.c elf.c greth.c \ - tap.c linenoise.c + tap.c gr740.c linenoise.c @LINENOISE_TRUE@am__objects_1 = linenoise.$(OBJEXT) am_sis_OBJECTS = erc32.$(OBJEXT) grlib.$(OBJEXT) leon3.$(OBJEXT) \ exec.$(OBJEXT) func.$(OBJEXT) help.$(OBJEXT) sparc.$(OBJEXT) \ riscv.$(OBJEXT) leon2.$(OBJEXT) sis.$(OBJEXT) interf.$(OBJEXT) \ remote.$(OBJEXT) elf.$(OBJEXT) greth.$(OBJEXT) tap.$(OBJEXT) \ - $(am__objects_1) + gr740.$(OBJEXT) $(am__objects_1) sis_OBJECTS = $(am_sis_OBJECTS) sis_DEPENDENCIES = DEFAULT_INCLUDES = -I.@am__isrc@ @@ -266,7 +266,7 @@ top_srcdir = @top_srcdir@ @LINENOISE_TRUE@LN_SRC = linenoise.c sis_SOURCES = erc32.c grlib.c leon3.c exec.c func.c help.c \ sparc.c riscv.c leon2.c sis.c interf.c remote.c elf.c \ - greth.c tap.c \ + greth.c tap.c gr740.c \ $(LN_SRC) AM_CFLAGS = -DFAST_UART @@ -381,6 +381,7 @@ distclean-compile: @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/erc32.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/exec.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/func.Po@am__quote@ +@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/gr740.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/greth.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/grlib.Po@am__quote@ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/help.Po@am__quote@ diff --git a/configure b/configure index f8c16f9..963d11f 100755 --- a/configure +++ b/configure @@ -1,6 +1,6 @@ #! /bin/sh # Guess values for system-dependent variables and create Makefiles. -# Generated by GNU Autoconf 2.69 for sis 2.24. +# Generated by GNU Autoconf 2.69 for sis 2.25. # # # Copyright (C) 1992-1996, 1998-2012 Free Software Foundation, Inc. @@ -577,8 +577,8 @@ MAKEFLAGS= # Identity of this package. PACKAGE_NAME='sis' PACKAGE_TARNAME='sis' -PACKAGE_VERSION='2.24' -PACKAGE_STRING='sis 2.24' +PACKAGE_VERSION='2.25' +PACKAGE_STRING='sis 2.25' PACKAGE_BUGREPORT='' PACKAGE_URL='' @@ -1283,7 +1283,7 @@ if test "$ac_init_help" = "long"; then # Omit some internal or obsolete options to make the list less imposing. # This message is too long to be a string in the A/UX 3.1 sh. cat <<_ACEOF -\`configure' configures sis 2.24 to adapt to many kinds of systems. +\`configure' configures sis 2.25 to adapt to many kinds of systems. Usage: $0 [OPTION]... [VAR=VALUE]... @@ -1354,7 +1354,7 @@ fi if test -n "$ac_init_help"; then case $ac_init_help in - short | recursive ) echo "Configuration of sis 2.24:";; + short | recursive ) echo "Configuration of sis 2.25:";; esac cat <<\_ACEOF @@ -1444,7 +1444,7 @@ fi test -n "$ac_init_help" && exit $ac_status if $ac_init_version; then cat <<\_ACEOF -sis configure 2.24 +sis configure 2.25 generated by GNU Autoconf 2.69 Copyright (C) 2012 Free Software Foundation, Inc. @@ -1742,7 +1742,7 @@ cat >config.log <<_ACEOF This file contains any messages produced by compilers while running configure, to aid debugging if configure makes a mistake. -It was created by sis $as_me 2.24, which was +It was created by sis $as_me 2.25, which was generated by GNU Autoconf 2.69. Invocation command line was $ $0 $@ @@ -2569,7 +2569,7 @@ fi # Define the identity of the package. PACKAGE='sis' - VERSION='2.24' + VERSION='2.25' cat >>confdefs.h <<_ACEOF @@ -4911,7 +4911,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_write_fail=1 # report actual input values of CONFIG_FILES etc. instead of their # values after options handling. ac_log=" -This file was extended by sis $as_me 2.24, which was +This file was extended by sis $as_me 2.25, which was generated by GNU Autoconf 2.69. Invocation command line was CONFIG_FILES = $CONFIG_FILES @@ -4977,7 +4977,7 @@ _ACEOF cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 ac_cs_config="`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`" ac_cs_version="\\ -sis config.status 2.24 +sis config.status 2.25 configured by $0, generated by GNU Autoconf 2.69, with options \\"\$ac_cs_config\\" diff --git a/configure.ac b/configure.ac index be4ca31..9a46dcb 100644 --- a/configure.ac +++ b/configure.ac @@ -1,4 +1,4 @@ -AC_INIT([sis], [2.24]) +AC_INIT([sis], [2.25]) AC_CONFIG_SRCDIR([sis.c]) AC_CONFIG_AUX_DIR([build-aux]) AC_CONFIG_HEADERS(config.h) diff --git a/func.c b/func.c index 02fcdec..36f9254 100644 --- a/func.c +++ b/func.c @@ -67,7 +67,7 @@ char bridge[32] = ""; /* RAM and ROM for all systems */ char romb[MAX_ROM_SIZE]; char ramb[MAX_RAM_SIZE]; -const struct memsys *ms = &erc32sys; +const struct memsys *ms; int cputype = 0; /* 0 = erc32, 2 = leon2,3 = leon3, 5 = riscv */ int sis_gdb_break; int cpu = 0; /* active cpu */ diff --git a/gr740.c b/gr740.c new file mode 100644 index 0000000..13a8831 --- /dev/null +++ b/gr740.c @@ -0,0 +1,255 @@ +/* + * This file is part of SIS. + * + * SIS, SPARC instruction simulator V2.5 Copyright (C) 1995 Jiri Gaisler, + * European Space Agency + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License as published by the Free + * Software Foundation; either version 3 of the License, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, see . + * + * Leon3 emulation, loosely based on erc32.c. + */ + +#define ROM_START 0xC0000000 +#define ROM_SIZE 0x01000000 +#define RAM_START 0x00000000 +#define RAM_SIZE 0x04000000 + +#include "config.h" +#include +#include +#include +#include +#include +#ifdef HAVE_TERMIOS_H +#include +#endif +#include +#include +#include "sis.h" +#include "grlib.h" + +/* APB registers */ +#define APBSTART 0xFF900000 + +/* Memory exception waitstates. */ +#define MEM_EX_WS 1 + +/* Forward declarations. */ + +static char *get_mem_ptr (uint32 addr, uint32 size); + +/* One-time init. */ + +static void +init_sim (void) +{ + int i; + + for (i = 0; i < NCPU; i++) + grlib_ahbm_add (&leon3s, 0); + + grlib_ahbs_add (&apbmst, 0, APBSTART, 0xFFF); + grlib_ahbs_add (&srctrl, 0, RAM_START, RAM_MASKPP); + + grlib_apb_add (&apbuart, 3, APBSTART + 0x02000, 0xFFF); + grlib_apb_add (&irqmp, 0, APBSTART + 0x04000, 0xFFF); + grlib_apb_add (&gptimer, 1, APBSTART + 0x08000, 0xFFF); + grlib_apb_add (&greth, 6, APBSTART + 0x40000, 0xFFF); + + grlib_init (); + ebase.ramstart = RAM_START; +} + +/* Power-on reset init. */ + +static void +reset (void) +{ + grlib_reset (); +} + +/* IU error mode manager. */ + +static void +error_mode (uint32 pc) +{ + +} + +/* Flush ports when simulator stops. */ + +static void +sim_halt (void) +{ +#ifdef FAST_UART + apbuart_flush (); +#endif +} + +static void +exit_sim (void) +{ + apbuart_close_port (); +} + +/* Memory emulation. */ + +static int +memory_read (uint32 addr, uint32 * data, int32 * ws) +{ + int32 mexc; + + *ws = 0; + if ((addr >= RAM_START) && (addr < RAM_END)) + { + memcpy (data, &ramb[addr & RAM_MASK], 4); + return 0; + } + else if ((addr >= ROM_START) && (addr < ROM_END)) + { + memcpy (data, &romb[addr & ROM_MASK], 4); + *ws = 2; + return 0; + } + else + { + mexc = grlib_read (addr, data); + *ws = 4; + } + + if (sis_verbose && mexc) + { + printf ("Memory exception at %x (illegal address)\n", addr); + *ws = MEM_EX_WS; + } + return mexc; +} + +static int +memory_write (uint32 addr, uint32 * data, int32 sz, int32 * ws) +{ + uint32 waddr; + int32 mexc; + + *ws = 0; + if ((addr >= RAM_START) && (addr < RAM_END)) + { + waddr = addr & RAM_MASK; + grlib_store_bytes (ramb, waddr, data, sz); + return 0; + } + else if ((addr >= ROM_START) && (addr < ROM_END)) + { + grlib_store_bytes (romb, addr, data, sz); + return 0; + } + else + { + mexc = grlib_write (addr, data, sz); + *ws = 4; + } + + if (sis_verbose && mexc) + { + printf ("Memory exception at %x (illegal address)\n", addr); + *ws = MEM_EX_WS; + } + return mexc; +} + +static char * +get_mem_ptr (uint32 addr, uint32 size) +{ + if ((addr >= RAM_START) && ((addr + size) < RAM_END)) + { + return &ramb[addr & RAM_MASK]; + } + else if ((addr >= ROM_START) && ((addr + size) < ROM_END)) + { + return &romb[addr & ROM_MASK]; + } + + return NULL; +} + +static int +sis_memory_write (uint32 addr, const char *data, uint32 length) +{ + char *mem; + int32 ws; + + if ((mem = get_mem_ptr (addr, length)) != NULL) + { + memcpy (mem, data, length); + return length; + } + else if (length == 4) + memory_write (addr, (uint32 *) data, 2, &ws); + return 0; +} + +static int +sis_memory_read (uint32 addr, char *data, uint32 length) +{ + char *mem; + int ws; + + if (length == 4) + { + memory_read (addr, (uint32 *) data, &ws); + return 4; + } + + if ((mem = get_mem_ptr (addr, length)) == NULL) + return 0; + + memcpy (data, mem, length); + return length; +} + +static void +boot_init (void) +{ + + int i; + + grlib_boot_init (); + for (i = 0; i < NCPU; i++) + { + sregs[i].wim = 2; + sregs[i].psr = 0xF30010e0; + sregs[i].r[30] = RAM_END - (i * 0x20000); + sregs[i].r[14] = sregs[i].r[30] - 96 * 4; + sregs[i].cache_ctrl = 0x81000f; + sregs[i].r[2] = sregs[i].r[30]; /* sp on RISCV-V */ + } +} + +const struct memsys gr740 = { + init_sim, + reset, + error_mode, + sim_halt, + exit_sim, + apbuart_init_stdio, + apbuart_restore_stdio, + memory_read, + memory_read, + memory_write, + sis_memory_write, + sis_memory_read, + boot_init, + get_mem_ptr, + grlib_set_irq +}; diff --git a/sis.c b/sis.c index 51005f6..837f516 100644 --- a/sis.c +++ b/sis.c @@ -168,6 +168,11 @@ main (argc, argv) { lcputype = CPU_LEON3; } + else if (strcmp (argv[stat], "-gr740") == 0) + { + lcputype = CPU_LEON3; + ms = &gr740; + } else if (strcmp (argv[stat], "-riscv") == 0) { lcputype = CPU_RISCV; @@ -231,7 +236,8 @@ main (argc, argv) case CPU_LEON3: printf (" LEON3 emulation enabled, %d cpus online, delta %d clocks\n", ncpu, delta); - ms = &leon3; + if (!ms) + ms = &leon3; if (!freq) freq = 50; break; @@ -246,6 +252,7 @@ main (argc, argv) default: printf (" ERC32 emulation enabled\n"); cputype = CPU_ERC32; + ms = &erc32sys; if (!freq) freq = 14; } diff --git a/sis.h b/sis.h index 44e524b..ea99f6d 100644 --- a/sis.h +++ b/sis.h @@ -372,6 +372,10 @@ extern const struct memsys leon2; /* leon3.c */ extern const struct memsys leon3; + +/* gr740.c */ +extern const struct memsys gr740; + /* remote.c */ extern void gdb_remote (int port); diff --git a/sis.info b/sis.info index 8a03051..87125da 100644 --- a/sis.info +++ b/sis.info @@ -1,6 +1,6 @@ This is sis.info, produced by makeinfo version 6.5 from sis.texi. -This manual is for SIS (version 2.23, 25 October 2020). +This manual is for SIS (version 2.25, 1 December 2020). Copyright (C) 2020 Free Software Foundation, Inc. @@ -21,7 +21,7 @@ File: sis.info, Node: Top, Next: Introduction, Up: (dir) SIS *** -This manual is for SIS (version 2.23, 25 October 2020). +This manual is for SIS (version 2.25, 1 December 2020). * Menu: @@ -619,7 +619,45 @@ The LEON3 power-down register (%ars19) is supported. When power-down is entered, time is skipped forward until the next event in the event queue. A Ctrl-C in the simulator window will exit the power-down mode. -4.4 RISC-V emulation +4.4 GR740 emulation +=================== + +In GR740 mode, SIS emulates a limited subset of the GR740 quad-core +LEON4 system as defined in the GR740 datasheet. The emulated system +includes only standard peripherals such as APBUART, GPTIMER, IRQMP +GRETHm and SRCTRL. The emulated system includes 16 Mbyte ROM and 64 +Mbyte RAM. The SPARC emulation supports an FPU but not the LEON3 MMU. + + To start sis in GR740 mode, use the -gr740 switch. + +4.4.1 GR740 peripherals +----------------------- + +The following IP cores from GRLIB are emulated in GR740 mode: + +IP Core Address Interrupt +------------------------------------------------------- +APBMAST 0xFF900000 - +APBUART 0xFF900000 3 +IRQMP 0xFF904000 - +GPTIMER 0xFF908000 1, 2 +GRETH 0xFF940000 6 + +4.4.2 Memory interface +---------------------- + +The following memory areas are valid for GR740: + +Address Type +------------------------------------------------------------------ +0x00000000 - 0x04000000 RAM (64 Mbyte) +0xC0000000 - 0xC1000000 RAM (16 Mbyte) +0xFF900000 - 0xFFA00000 APB bus +0xFFFFF000 - 0xFFFFFFFF AHB plug&play + + Access to non-existing memory will result in a memory exception trap. + +4.5 RISC-V emulation ==================== In RISC-V mode, SIS emulates a RV32IMACFD processor as defined in the @@ -628,20 +666,20 @@ identical GRLIB sub-system as when LEON3 is emulated. To start sis in RISC-V mode, use the -riscv switch. -4.4.1 Power-down mode +4.5.1 Power-down mode --------------------- The RISC-V power-down feature (WFI) is supported. When power-down is entered, time is skipped forward until the next event in the event queue. Ctrl-C in the simulator window will exit the power-down mode. -4.4.2 Code coverage +4.5.2 Code coverage ------------------- Code coverage is currently only supported for 32-bit instructions, i.e. the C-extension can not be used when code coverage is measured. -4.4.3 RISC-V 64-bit timer +4.5.3 RISC-V 64-bit timer ------------------------- The standard RISC-V 64-bit timer is provided and can be read through the @@ -1362,12 +1400,12 @@ Node: Introduction1053 Node: Invoking sis1677 Node: Commands4109 Node: Emulated Systems8213 -Node: Multi-processing20925 -Node: Networking21413 -Node: Interfacing to GDB27723 -Node: Code coverage28127 -Node: Building SIS29132 -Node: GNU Free Documentation License29782 -Node: Index54926 +Node: Multi-processing22329 +Node: Networking22817 +Node: Interfacing to GDB29127 +Node: Code coverage29531 +Node: Building SIS30536 +Node: GNU Free Documentation License31186 +Node: Index56330  End Tag Table diff --git a/sis.texi b/sis.texi index 51d20c8..019bfaf 100644 --- a/sis.texi +++ b/sis.texi @@ -126,6 +126,9 @@ The frequency must be an integer indicating the frequency in MHz. Start a gdb server, listening on port 1234. An alternative port can be specified with @var{-port nn}. +@item -gr740 +Emulate a (limited) GR740 SOC device + @item -leon2 Emulate the SPARC V8 LEON2 processor @@ -621,6 +624,43 @@ The LEON3 power-down register (%ars19) is supported. When power-down is entered, time is skipped forward until the next event in the event queue. A Ctrl-C in the simulator window will exit the power-down mode. +@section GR740 emulation + +In GR740 mode, SIS emulates a limited subset of the GR740 quad-core LEON4 +system as defined in the GR740 datasheet. The emulated system includes only +standard peripherals such as APBUART, GPTIMER, IRQMP GRETHm and SRCTRL. +The emulated system includes 16 Mbyte ROM and 64 Mbyte RAM. The SPARC +emulation supports an FPU but not the LEON3 MMU. + +To start sis in GR740 mode, use the -gr740 switch. + +@subsection GR740 peripherals + +The following IP cores from GRLIB are emulated in GR740 mode: + +@multitable {The long name of the core} {Address_long} {Interrupt} +@headitem IP Core @tab Address @tab Interrupt +@item APBMAST @tab 0xFF900000 @tab - +@item APBUART @tab 0xFF900000 @tab 3 +@item IRQMP @tab 0xFF904000 @tab - +@item GPTIMER @tab 0xFF908000 @tab 1, 2 +@item GRETH @tab 0xFF940000 @tab 6 +@end multitable + +@subsection Memory interface + +The following memory areas are valid for GR740: + +@multitable {Very long text so that we avoid wrapping } {A long long Address} +@headitem Address @tab Type +@item 0x00000000 - 0x04000000 @tab RAM (64 Mbyte) +@item 0xC0000000 - 0xC1000000 @tab RAM (16 Mbyte) +@item 0xFF900000 - 0xFFA00000 @tab APB bus +@item 0xFFFFF000 - 0xFFFFFFFF @tab AHB plug&play +@end multitable + +Access to non-existing memory will result in a memory exception trap. + @section RISC-V emulation In RISC-V mode, SIS emulates a RV32IMACFD processor as defined in the diff --git a/version.texi b/version.texi index 9074a5e..9300ecc 100644 --- a/version.texi +++ b/version.texi @@ -1,4 +1,4 @@ -@set UPDATED 9 November 2020 -@set UPDATED-MONTH November 2020 -@set EDITION 2.24 -@set VERSION 2.24 +@set UPDATED 1 December 2020 +@set UPDATED-MONTH December 2020 +@set EDITION 2.25 +@set VERSION 2.25 -- cgit v1.2.3