From a5f94c8854d11ae726f51ea713e94e1ca3b1ccdb Mon Sep 17 00:00:00 2001 From: Jarielle Catbagan Date: Fri, 3 Jul 2015 10:54:49 -0700 Subject: BBB: Migrate custom exception handler mapping from rom_reset.S to ram_vector_install() in cpuio.c --- ports/beagleboneblack/cpuio.c | 25 ++++++++++++++++++++++++- ports/beagleboneblack/rom_reset.S | 37 ------------------------------------- 2 files changed, 24 insertions(+), 38 deletions(-) diff --git a/ports/beagleboneblack/cpuio.c b/ports/beagleboneblack/cpuio.c index 3be316b..ffa076d 100644 --- a/ports/beagleboneblack/cpuio.c +++ b/ports/beagleboneblack/cpuio.c @@ -109,11 +109,34 @@ target_reset(void) monrestart(INITIALIZE); } +/* Override the default exception handlers provided by the AM335x + * internal ROM code with uMon's custom exception handlers + */ +void +ram_vector_install(void) +{ + extern unsigned long abort_data; + extern unsigned long abort_prefetch; + extern unsigned long undefined_instruction; + extern unsigned long software_interrupt; + extern unsigned long interrupt_request; + extern unsigned long fast_interrupt_request; + extern unsigned long not_assigned; + + *(ulong **)0x4030ce24 = &undefined_instruction; + *(ulong **)0x4030ce28 = &software_interrupt; + *(ulong **)0x4030ce2c = &abort_prefetch; + *(ulong **)0x4030ce30 = &abort_data; + *(ulong **)0x4030ce34 = ¬_assigned; + *(ulong **)0x4030ce38 = &interrupt_request; + *(ulong **)0x4030ce3c = &fast_interrupt_request; +} + /* If any CPU IO wasn't initialized in reset.S, do it here... * This just provides a "C-level" IO init opportunity. */ void initCPUio(void) { - /* ADD_CODE_HERE */ + ram_vector_install(); } diff --git a/ports/beagleboneblack/rom_reset.S b/ports/beagleboneblack/rom_reset.S index 83d79df..176f3a7 100644 --- a/ports/beagleboneblack/rom_reset.S +++ b/ports/beagleboneblack/rom_reset.S @@ -93,43 +93,6 @@ coldstart_1: orr r0,r0,#0xd3 // Set mode to supervisor, IRQ FIQ disabled. msr cpsr,r0 - /* store the address of the custom exception handlers in the exception vector space - of the AM335x Public RAM */ - ldr r1, =undefined_instruction - movw r2, #0xce24 - movt r2, #0x4030 - str r1, [r2] - - ldr r1, =software_interrupt - movw r2, #0xce28 - movt r2, #0x4030 - str r1, [r2] - - ldr r1, =abort_prefetch - movw r2, #0xce2c - movt r2, #0x4030 - str r1, [r2] - - ldr r1, =abort_data - movw r2, #0xce30 - movt r2, #0x4030 - str r1, [r2] - - ldr r1, =not_assigned - movw r2, #0xce34 - movt r2, #0x4030 - str r1, [r2] - - ldr r1, =interrupt_request - movw r2, #0xce38 - movt r2, #0x4030 - str r1, [r2] - - ldr r1, =fast_interrupt_request - movw r2, #0xce3c - movt r2, #0x4030 - str r1, [r2] - // bl cache_init /********************************************************************/ -- cgit v1.2.3