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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2021-04-22 14:03:25 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2021-04-27 11:23:06 +0200 |
| commit | 1c036bbb871d2e1246ab7a84f814de1b6a6d38d2 (patch) | |
| tree | 7c430218475b322b4a52ec25fb2b4ba521b71b97 /spec-glossary | |
| parent | 4e58a4110a43e19d20f3d6c275ed25b74a2e8cd6 (diff) | |
spec: Update /rtems/intr/* documentation
Diffstat (limited to 'spec-glossary')
| -rw-r--r-- | spec-glossary/glossary/target-arch.yml | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/spec-glossary/glossary/target-arch.yml b/spec-glossary/glossary/target-arch.yml new file mode 100644 index 00000000..364ddfb5 --- /dev/null +++ b/spec-glossary/glossary/target-arch.yml @@ -0,0 +1,14 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +copyrights: +- Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de) +enabled-by: true +glossary-type: term +links: +- role: glossary-member + uid: ../glossary-general +term: target architecture +text: | + The target architecture is the instruction set architecture (ISA) of the + ${target:/term}. Some RTEMS features depend on the target architecture. For + the details consult the *RTEMS CPU Architecture Supplement*. +type: glossary |