diff options
Diffstat (limited to 'rtemslwip/zynqmp/xparameters_ps.h')
| -rw-r--r-- | rtemslwip/zynqmp/xparameters_ps.h | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/rtemslwip/zynqmp/xparameters_ps.h b/rtemslwip/zynqmp/xparameters_ps.h new file mode 100644 index 0000000..427ae77 --- /dev/null +++ b/rtemslwip/zynqmp/xparameters_ps.h @@ -0,0 +1,68 @@ +/* + * Copyright (C) 2022 On-Line Applications Research Corporation (OAR) + * Written by Kinsey Moore <kinsey.moore@oarcorp.com> + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _XPARAMETERS_PS_H_ +#define _XPARAMETERS_PS_H_ + +#define XPAR_XEMACPS_0_INTR XPS_GEM0_INT_ID +#define XPAR_XEMACPS_0_WAKE_INTR XPS_GEM0_WAKE_INT_ID +#define XPAR_XEMACPS_1_INTR XPS_GEM1_INT_ID +#define XPAR_XEMACPS_1_WAKE_INTR XPS_GEM1_WAKE_INT_ID +#define XPAR_XEMACPS_2_INTR XPS_GEM2_INT_ID +#define XPAR_XEMACPS_2_WAKE_INTR XPS_GEM2_WAKE_INT_ID +#define XPAR_XEMACPS_3_INTR XPS_GEM3_INT_ID +#define XPAR_XEMACPS_3_WAKE_INTR XPS_GEM3_WAKE_INT_ID + +#define XPS_SYS_CTRL_BASEADDR 0xFF180000U + +#define XPS_GEM0_INT_ID ( 57U + 32U ) +#define XPS_GEM0_WAKE_INT_ID ( 58U + 32U ) +#define XPS_GEM1_INT_ID ( 59U + 32U ) +#define XPS_GEM1_WAKE_INT_ID ( 60U + 32U ) +#define XPS_GEM2_INT_ID ( 61U + 32U ) +#define XPS_GEM2_WAKE_INT_ID ( 62U + 32U ) +#define XPS_GEM3_INT_ID ( 63U + 32U ) +#define XPS_GEM3_WAKE_INT_ID ( 64U + 32U ) + +#define XPAR_PSU_ETHERNET_0_INTR XPS_GEM0_INT_ID +#define XPAR_PSU_ETHERNET_0_WAKE_INTR XPS_GEM0_WAKE_INT_ID +#define XPAR_PSU_ETHERNET_1_INTR XPS_GEM1_INT_ID +#define XPAR_PSU_ETHERNET_1_WAKE_INTR XPS_GEM1_WAKE_INT_ID +#define XPAR_PSU_ETHERNET_2_INTR XPS_GEM2_INT_ID +#define XPAR_PSU_ETHERNET_2_WAKE_INTR XPS_GEM2_WAKE_INT_ID +#define XPAR_PSU_ETHERNET_3_INTR XPS_GEM3_INT_ID +#define XPAR_PSU_ETHERNET_3_WAKE_INTR XPS_GEM3_WAKE_INT_ID + +#define XPAR_PSU_ETHERNET_0_INTERRUPT_ID 0x4039U +#define XPAR_PSU_ETHERNET_0_WAKE_INTERRUPT_ID 0x4039U +#define XPAR_PSU_ETHERNET_1_INTERRUPT_ID 0x403BU +#define XPAR_PSU_ETHERNET_1_WAKE_INTERRUPT_ID 0x403BU +#define XPAR_PSU_ETHERNET_2_INTERRUPT_ID 0x403DU +#define XPAR_PSU_ETHERNET_2_WAKE_INTERRUPT_ID 0x403DU +#define XPAR_PSU_ETHERNET_3_INTERRUPT_ID 0x403FU +#define XPAR_PSU_ETHERNET_3_WAKE_INTERRUPT_ID 0x403FU + +#endif |