diff options
Diffstat (limited to 'bsps/arm/stm32h7/include/stm32h7xx_hal_rcc_ex.h')
| -rw-r--r-- | bsps/arm/stm32h7/include/stm32h7xx_hal_rcc_ex.h | 84 |
1 files changed, 84 insertions, 0 deletions
diff --git a/bsps/arm/stm32h7/include/stm32h7xx_hal_rcc_ex.h b/bsps/arm/stm32h7/include/stm32h7xx_hal_rcc_ex.h index 2fb1fd2906..9b0a8d404b 100644 --- a/bsps/arm/stm32h7/include/stm32h7xx_hal_rcc_ex.h +++ b/bsps/arm/stm32h7/include/stm32h7xx_hal_rcc_ex.h @@ -36,6 +36,7 @@ extern "C" { /* Exported types ------------------------------------------------------------*/ /** @defgroup RCCEx_Exported_Types RCCEx Exported Types + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ @@ -342,10 +343,12 @@ typedef struct /* Exported constants --------------------------------------------------------*/ /** @defgroup RCCEx_Exported_Constants RCCEx Exported Constants + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ /** @defgroup RCCEx_Periph_Clock_Selection RCCEx Periph Clock Selection + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ @@ -466,6 +469,7 @@ typedef struct /** @defgroup RCC_PLL2_Clock_Output RCC PLL2 Clock Output + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_PLL2_DIVP RCC_PLLCFGR_DIVP2EN @@ -477,6 +481,7 @@ typedef struct */ /** @defgroup RCC_PLL3_Clock_Output RCC PLL3 Clock Output + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_PLL3_DIVP RCC_PLLCFGR_DIVP3EN @@ -488,6 +493,7 @@ typedef struct */ /** @defgroup RCC_PLL2_VCI_Range RCC PLL2 VCI Range + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_PLL2VCIRANGE_0 RCC_PLLCFGR_PLL2RGE_0 /*!< Clock range frequency between 1 and 2 MHz */ @@ -501,6 +507,7 @@ typedef struct /** @defgroup RCC_PLL2_VCO_Range RCC PLL2 VCO Range + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_PLL2VCOWIDE (0x00000000U) @@ -511,6 +518,7 @@ typedef struct */ /** @defgroup RCC_PLL3_VCI_Range RCC PLL3 VCI Range + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_PLL3VCIRANGE_0 RCC_PLLCFGR_PLL3RGE_0 /*!< Clock range frequency between 1 and 2 MHz */ @@ -524,6 +532,7 @@ typedef struct /** @defgroup RCC_PLL3_VCO_Range RCC PLL3 VCO Range + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_PLL3VCOWIDE (0x00000000U) @@ -534,6 +543,7 @@ typedef struct */ /** @defgroup RCCEx_USART16_Clock_Source RCCEx USART1/6 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #if defined(RCC_D2CCIP2R_USART16SEL) @@ -588,6 +598,7 @@ typedef struct */ /** @defgroup RCCEx_USART1_Clock_Source RCCEx USART1 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_USART1CLKSOURCE_D2PCLK2 RCC_USART16CLKSOURCE_D2PCLK2 @@ -601,6 +612,7 @@ typedef struct */ /** @defgroup RCCEx_USART6_Clock_Source RCCEx USART6 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_USART6CLKSOURCE_D2PCLK2 RCC_USART16CLKSOURCE_D2PCLK2 @@ -616,6 +628,7 @@ typedef struct #if defined(UART9) /** @defgroup RCCEx_UART9_Clock_Source RCCEx UART9 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_UART9CLKSOURCE_D2PCLK2 RCC_USART16CLKSOURCE_D2PCLK2 @@ -631,6 +644,7 @@ typedef struct #if defined(USART10) /** @defgroup RCCEx_USART10_Clock_Source RCCEx USART10 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_USART10CLKSOURCE_D2PCLK2 RCC_USART16CLKSOURCE_D2PCLK2 @@ -645,6 +659,7 @@ typedef struct #endif /* USART10 */ /** @defgroup RCCEx_USART234578_Clock_Source RCCEx USART2/3/4/5/7/8 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #if defined(RCC_D2CCIP2R_USART28SEL) @@ -672,6 +687,7 @@ typedef struct */ /** @defgroup RCCEx_USART2_Clock_Source RCCEx USART2 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_USART2CLKSOURCE_D2PCLK1 RCC_USART234578CLKSOURCE_D2PCLK1 @@ -686,6 +702,7 @@ typedef struct */ /** @defgroup RCCEx_USART3_Clock_Source RCCEx USART3 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_USART3CLKSOURCE_D2PCLK1 RCC_USART234578CLKSOURCE_D2PCLK1 @@ -700,6 +717,7 @@ typedef struct */ /** @defgroup RCCEx_UART4_Clock_Source RCCEx UART4 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_UART4CLKSOURCE_D2PCLK1 RCC_USART234578CLKSOURCE_D2PCLK1 @@ -714,6 +732,7 @@ typedef struct */ /** @defgroup RCCEx_UART5_Clock_Source RCCEx UART5 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_UART5CLKSOURCE_D2PCLK1 RCC_USART234578CLKSOURCE_D2PCLK1 @@ -728,6 +747,7 @@ typedef struct */ /** @defgroup RCCEx_UART7_Clock_Source RCCEx UART7 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_UART7CLKSOURCE_D2PCLK1 RCC_USART234578CLKSOURCE_D2PCLK1 @@ -742,6 +762,7 @@ typedef struct */ /** @defgroup RCCEx_UART8_Clock_Source RCCEx UART8 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_UART8CLKSOURCE_D2PCLK1 RCC_USART234578CLKSOURCE_D2PCLK1 @@ -756,6 +777,7 @@ typedef struct */ /** @defgroup RCCEx_LPUART1_Clock_Source RCCEx LPUART1 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #if defined(RCC_D3CCIPR_LPUART1SEL) @@ -783,6 +805,7 @@ typedef struct */ /** @defgroup RCCEx_I2C1235_Clock_Source RCCEx I2C1/2/3/5 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #if defined (RCC_D2CCIP2R_I2C123SEL) @@ -823,6 +846,7 @@ typedef struct */ /** @defgroup RCCEx_I2C1_Clock_Source RCCEx I2C1 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #if defined(I2C5) @@ -842,6 +866,7 @@ typedef struct */ /** @defgroup RCCEx_I2C2_Clock_Source RCCEx I2C2 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #if defined(I2C5) @@ -861,6 +886,7 @@ typedef struct */ /** @defgroup RCCEx_I2C3_Clock_Source RCCEx I2C3 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #if defined(I2C5) @@ -880,6 +906,7 @@ typedef struct */ /** @defgroup RCCEx_I2C4_Clock_Source RCCEx I2C4 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #if defined(RCC_D3CCIPR_I2C4SEL) @@ -901,6 +928,7 @@ typedef struct */ #if defined(I2C5) /** @defgroup RCCEx_I2C5_Clock_Source RCCEx I2C5 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_I2C5CLKSOURCE_D2PCLK1 RCC_I2C1235CLKSOURCE_D2PCLK1 @@ -914,6 +942,7 @@ typedef struct #endif /*I2C5*/ /** @defgroup RCCEx_RNG_Clock_Source RCCEx RNG Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #if defined(RCC_D2CCIP2R_RNGSEL) @@ -934,6 +963,7 @@ typedef struct #if defined(HRTIM1) /** @defgroup RCCEx_HRTIM1_Clock_Source RCC Extended HRTIM1 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_HRTIM1CLK_TIMCLK (0x00000000U) @@ -945,6 +975,7 @@ typedef struct #endif /*HRTIM1*/ /** @defgroup RCCEx_USB_Clock_Source RCCEx USB Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #if defined(RCC_D2CCIP2R_USBSEL) @@ -962,6 +993,7 @@ typedef struct */ /** @defgroup RCCEx_SAI1_Clock_Source SAI1 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #if defined(RCC_D2CCIP1R_SAI1SEL) @@ -983,6 +1015,7 @@ typedef struct #if defined(SAI3) /** @defgroup RCCEx_SAI23_Clock_Source SAI2/3 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_SAI23CLKSOURCE_PLL (0x00000000U) @@ -995,6 +1028,7 @@ typedef struct */ /** @defgroup RCCEx_SAI2_Clock_Source SAI2 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_SAI2CLKSOURCE_PLL RCC_SAI23CLKSOURCE_PLL @@ -1008,6 +1042,7 @@ typedef struct */ /** @defgroup RCCEx_SAI3_Clock_Source SAI3 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_SAI3CLKSOURCE_PLL RCC_SAI23CLKSOURCE_PLL @@ -1022,6 +1057,7 @@ typedef struct #if defined(RCC_CDCCIP1R_SAI2ASEL) /** @defgroup RCCEx_SAI2A_Clock_Source SAI2A Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_SAI2ACLKSOURCE_PLL (0x00000000U) @@ -1037,6 +1073,7 @@ typedef struct #if defined(RCC_CDCCIP1R_SAI2BSEL) /** @defgroup RCCEx_SAI2B_Clock_Source SAI2B Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_SAI2BCLKSOURCE_PLL (0x00000000U) @@ -1052,6 +1089,7 @@ typedef struct /** @defgroup RCCEx_SPI123_Clock_Source SPI1/2/3 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #if defined(RCC_D2CCIP1R_SPI123SEL) @@ -1072,6 +1110,7 @@ typedef struct */ /** @defgroup RCCEx_SPI1_Clock_Source SPI1 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_SPI1CLKSOURCE_PLL RCC_SPI123CLKSOURCE_PLL @@ -1085,6 +1124,7 @@ typedef struct */ /** @defgroup RCCEx_SPI2_Clock_Source SPI2 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_SPI2CLKSOURCE_PLL RCC_SPI123CLKSOURCE_PLL @@ -1098,6 +1138,7 @@ typedef struct */ /** @defgroup RCCEx_SPI3_Clock_Source SPI3 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_SPI3CLKSOURCE_PLL RCC_SPI123CLKSOURCE_PLL @@ -1111,6 +1152,7 @@ typedef struct */ /** @defgroup RCCEx_SPI45_Clock_Source SPI4/5 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #if defined(RCC_D2CCIP1R_SPI45SEL) @@ -1137,6 +1179,7 @@ typedef struct */ /** @defgroup RCCEx_SPI4_Clock_Source SPI4 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_SPI4CLKSOURCE_D2PCLK2 RCC_SPI45CLKSOURCE_D2PCLK2 @@ -1151,6 +1194,7 @@ typedef struct */ /** @defgroup RCCEx_SPI5_Clock_Source SPI5 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_SPI5CLKSOURCE_D2PCLK2 RCC_SPI45CLKSOURCE_D2PCLK2 @@ -1165,6 +1209,7 @@ typedef struct */ /** @defgroup RCCEx_SPI6_Clock_Source SPI6 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #if defined(RCC_D3CCIPR_SPI6SEL) @@ -1195,6 +1240,7 @@ typedef struct #if defined(SAI4_Block_A) /** @defgroup RCCEx_SAI4A_Clock_Source SAI4A Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_SAI4ACLKSOURCE_PLL (0x00000000U) @@ -1215,6 +1261,7 @@ typedef struct #if defined(SAI4_Block_B) /** @defgroup RCCEx_SAI4B_Clock_Source SAI4B Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_SAI4BCLKSOURCE_PLL (0x00000000U) @@ -1233,6 +1280,7 @@ typedef struct /** @defgroup RCCEx_LPTIM1_Clock_Source RCCEx LPTIM1 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #if defined(RCC_D2CCIP2R_LPTIM1SEL) @@ -1261,6 +1309,7 @@ typedef struct */ /** @defgroup RCCEx_LPTIM2_Clock_Source RCCEx LPTIM2 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #if defined(RCC_D3CCIPR_LPTIM2SEL) @@ -1288,6 +1337,7 @@ typedef struct */ /** @defgroup RCCEx_LPTIM345_Clock_Source RCCEx LPTIM3/4/5 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #if defined(RCC_D3CCIPR_LPTIM345SEL) @@ -1315,6 +1365,7 @@ typedef struct */ /** @defgroup RCCEx_LPTIM3_Clock_Source RCCEx LPTIM3 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_LPTIM3CLKSOURCE_D3PCLK1 RCC_LPTIM345CLKSOURCE_D3PCLK1 @@ -1329,6 +1380,7 @@ typedef struct */ #if defined(LPTIM4) /** @defgroup RCCEx_LPTIM4_Clock_Source RCCEx LPTIM4 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_LPTIM4CLKSOURCE_D3PCLK1 RCC_LPTIM345CLKSOURCE_D3PCLK1 @@ -1344,6 +1396,7 @@ typedef struct #if defined(LPTIM5) /** @defgroup RCCEx_LPTIM5_Clock_Source RCCEx LPTIM5 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_LPTIM5CLKSOURCE_D3PCLK1 RCC_LPTIM345CLKSOURCE_D3PCLK1 @@ -1360,6 +1413,7 @@ typedef struct #if defined(QUADSPI) /** @defgroup RCCEx_QSPI_Clock_Source RCCEx QSPI Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_QSPICLKSOURCE_D1HCLK (0x00000000U) @@ -1375,6 +1429,7 @@ typedef struct #if defined(OCTOSPI1) || defined(OCTOSPI2) /** @defgroup RCCEx_OSPI_Clock_Source RCCEx OSPI Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ @@ -1402,6 +1457,7 @@ typedef struct #if defined(DSI) /** @defgroup RCCEx_DSI_Clock_Source RCCEx DSI Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_DSICLKSOURCE_PHY (0x00000000U) @@ -1413,6 +1469,7 @@ typedef struct #endif /* DSI */ /** @defgroup RCCEx_FMC_Clock_Source RCCEx FMC Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #if defined(RCC_D1CCIPR_FMCSEL) @@ -1436,6 +1493,7 @@ typedef struct #if defined(FDCAN1) || defined(FDCAN2) /** @defgroup RCCEx_FDCAN_Clock_Source RCCEx FDCAN Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #if defined(RCC_D2CCIP1R_FDCANSEL) @@ -1454,6 +1512,7 @@ typedef struct /** @defgroup RCCEx_SDMMC_Clock_Source RCCEx SDMMC Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #if defined(RCC_D1CCIPR_SDMMCSEL) @@ -1469,6 +1528,7 @@ typedef struct /** @defgroup RCCEx_ADC_Clock_Source RCCEx ADC Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #if defined(RCC_D3CCIPR_ADCSEL_0) @@ -1485,6 +1545,7 @@ typedef struct */ /** @defgroup RCCEx_SWPMI1_Clock_Source RCCEx SWPMI1 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #if defined(RCC_D2CCIP1R_SWPSEL) @@ -1501,6 +1562,7 @@ typedef struct */ /** @defgroup RCCEx_DFSDM1_Clock_Source RCCEx DFSDM1 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #if defined(RCC_D2CCIP1R_DFSDM1SEL) @@ -1518,6 +1580,7 @@ typedef struct #if defined(DFSDM2_BASE) /** @defgroup RCCEx_DFSDM2_Clock_Source RCCEx DFSDM2 Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_DFSDM2CLKSOURCE_SRDPCLK4 (0x00000000U) @@ -1530,6 +1593,7 @@ typedef struct #endif /* DFSDM2 */ /** @defgroup RCCEx_SPDIFRX_Clock_Source RCCEx SPDIFRX Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #if defined(RCC_D2CCIP1R_SPDIFSEL_0) @@ -1548,6 +1612,7 @@ typedef struct */ /** @defgroup RCCEx_CEC_Clock_Source RCCEx CEC Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #if defined(RCC_D2CCIP2R_CECSEL_0) @@ -1565,6 +1630,7 @@ typedef struct /** @defgroup RCCEx_CLKP_Clock_Source RCCEx CLKP Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #if defined(RCC_D1CCIPR_CKPERSEL_0) @@ -1581,6 +1647,7 @@ typedef struct */ /** @defgroup RCCEx_TIM_Prescaler_Selection RCCEx TIM Prescaler Selection + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_TIMPRES_DESACTIVATED (0x00000000U) @@ -1593,6 +1660,7 @@ typedef struct #if defined(DUAL_CORE) /** @defgroup RCCEx_RCC_BootCx RCCEx RCC BootCx + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_BOOT_C1 RCC_GCR_BOOT_C1 @@ -1605,6 +1673,7 @@ typedef struct #if defined(DUAL_CORE) /** @defgroup RCCEx_RCC_WWDGx RCCEx RCC WWDGx + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_WWDG1 RCC_GCR_WW1RSC @@ -1617,6 +1686,7 @@ typedef struct #else /** @defgroup RCCEx_RCC_WWDGx RCCEx RCC WWDGx + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_WWDG1 RCC_GCR_WW1RSC @@ -1628,6 +1698,7 @@ typedef struct #endif /*DUAL_CORE*/ /** @defgroup RCCEx_EXTI_LINE_LSECSS RCC LSE CSS external interrupt line + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_EXTI_LINE_LSECSS EXTI_IMR1_IM18 /*!< External interrupt line 18 connected to the LSE CSS EXTI Line */ @@ -1636,6 +1707,7 @@ typedef struct */ /** @defgroup RCCEx_CRS_Status RCCEx CRS Status + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_CRS_NONE (0x00000000U) @@ -1650,6 +1722,7 @@ typedef struct */ /** @defgroup RCCEx_CRS_SynchroSource RCCEx CRS SynchroSource + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_CRS_SYNC_SOURCE_PIN (0x00000000U) /*!< Synchro Signal source external pin, Available on STM32H7 Rev.B and above devices only */ @@ -1663,6 +1736,7 @@ typedef struct */ /** @defgroup RCCEx_CRS_SynchroDivider RCCEx CRS SynchroDivider + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_CRS_SYNC_DIV1 (0x00000000U) /*!< Synchro Signal not divided (default) */ @@ -1678,6 +1752,7 @@ typedef struct */ /** @defgroup RCCEx_CRS_SynchroPolarity RCCEx CRS SynchroPolarity + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_CRS_SYNC_POLARITY_RISING (0x00000000U) /*!< Synchro Active on rising edge (default) */ @@ -1687,6 +1762,7 @@ typedef struct */ /** @defgroup RCCEx_CRS_ReloadValueDefault RCCEx CRS ReloadValueDefault + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_CRS_RELOADVALUE_DEFAULT (0x0000BB7FU) /*!< The reset value of the RELOAD field corresponds @@ -1696,6 +1772,7 @@ typedef struct */ /** @defgroup RCCEx_CRS_ErrorLimitDefault RCCEx CRS ErrorLimitDefault + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_CRS_ERRORLIMIT_DEFAULT (0x00000022U) /*!< Default Frequency error limit */ @@ -1704,6 +1781,7 @@ typedef struct */ /** @defgroup RCCEx_CRS_HSI48CalibrationDefault RCCEx CRS HSI48CalibrationDefault + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_CRS_HSI48CALIBRATION_DEFAULT (0x00000020U) /*!< The default value is 32, which corresponds to the middle of the trimming interval. @@ -1714,6 +1792,7 @@ typedef struct */ /** @defgroup RCCEx_CRS_FreqErrorDirection RCCEx CRS FreqErrorDirection + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_CRS_FREQERRORDIR_UP (0x00000000U) /*!< Upcounting direction, the actual frequency is above the target */ @@ -1723,6 +1802,7 @@ typedef struct */ /** @defgroup RCCEx_CRS_Interrupt_Sources RCCEx CRS Interrupt Sources + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_CRS_IT_SYNCOK CRS_CR_SYNCOKIE /*!< SYNC event OK */ @@ -1738,6 +1818,7 @@ typedef struct */ /** @defgroup RCCEx_CRS_Flags RCCEx CRS Flags + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define RCC_CRS_FLAG_SYNCOK CRS_ISR_SYNCOKF /*!< SYNC event OK flag */ @@ -1760,6 +1841,7 @@ typedef struct /* Exported macro ------------------------------------------------------------*/ /** @defgroup RCCEx_Exported_Macros RCCEx Exported Macros + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ @@ -3839,6 +3921,7 @@ typedef struct } while(0) /** @defgroup RCCEx_CRS_Extended_Features RCCEx CRS Extended Features + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ /** @@ -3959,6 +4042,7 @@ void HAL_RCCEx_CRS_ErrorCallback(uint32_t Error); * @{ */ /** @defgroup RCCEx_IS_RCC_Definitions RCC Private macros to check input parameters + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ |