diff options
Diffstat (limited to 'bsps/arm/stm32h7/include/stm32h7xx_hal_tim.h')
| -rw-r--r-- | bsps/arm/stm32h7/include/stm32h7xx_hal_tim.h | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/bsps/arm/stm32h7/include/stm32h7xx_hal_tim.h b/bsps/arm/stm32h7/include/stm32h7xx_hal_tim.h index 6daa529659..7d3473fee2 100644 --- a/bsps/arm/stm32h7/include/stm32h7xx_hal_tim.h +++ b/bsps/arm/stm32h7/include/stm32h7xx_hal_tim.h @@ -37,6 +37,7 @@ extern "C" { /* Exported types ------------------------------------------------------------*/ /** @defgroup TIM_Exported_Types TIM Exported Types + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ @@ -451,10 +452,12 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to /* Exported constants --------------------------------------------------------*/ /** @defgroup TIM_Exported_Constants TIM Exported Constants + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ /** @defgroup TIM_ClearInput_Source TIM Clear Input Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_CLEARINPUTSOURCE_NONE 0x00000000U /*!< OCREF_CLR is disabled */ @@ -464,6 +467,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_DMA_Base_address TIM DMA Base Address + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_DMABASE_CR1 0x00000000U @@ -499,6 +503,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Event_Source TIM Event Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_EVENTSOURCE_UPDATE TIM_EGR_UG /*!< Reinitialize the counter and generates an update of the registers */ @@ -515,6 +520,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Input_Channel_Polarity TIM Input Channel polarity + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_INPUTCHANNELPOLARITY_RISING 0x00000000U /*!< Polarity for TIx source */ @@ -525,6 +531,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_ETR_Polarity TIM ETR Polarity + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_ETRPOLARITY_INVERTED TIM_SMCR_ETP /*!< Polarity for ETR source */ @@ -534,6 +541,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_ETR_Prescaler TIM ETR Prescaler + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_ETRPRESCALER_DIV1 0x00000000U /*!< No prescaler is used */ @@ -545,6 +553,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Counter_Mode TIM Counter Mode + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_COUNTERMODE_UP 0x00000000U /*!< Counter used as up-counter */ @@ -557,6 +566,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Update_Interrupt_Flag_Remap TIM Update Interrupt Flag Remap + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_UIFREMAP_DISABLE 0x00000000U /*!< Update interrupt flag remap disabled */ @@ -566,6 +576,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_ClockDivision TIM Clock Division + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_CLOCKDIVISION_DIV1 0x00000000U /*!< Clock division: tDTS=tCK_INT */ @@ -576,6 +587,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Output_Compare_State TIM Output Compare State + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_OUTPUTSTATE_DISABLE 0x00000000U /*!< Capture/Compare 1 output disabled */ @@ -585,6 +597,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_AutoReloadPreload TIM Auto-Reload Preload + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_AUTORELOAD_PRELOAD_DISABLE 0x00000000U /*!< TIMx_ARR register is not buffered */ @@ -595,6 +608,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Output_Fast_State TIM Output Fast State + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_OCFAST_DISABLE 0x00000000U /*!< Output Compare fast disable */ @@ -604,6 +618,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Output_Compare_N_State TIM Complementary Output Compare State + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_OUTPUTNSTATE_DISABLE 0x00000000U /*!< OCxN is disabled */ @@ -613,6 +628,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Output_Compare_Polarity TIM Output Compare Polarity + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_OCPOLARITY_HIGH 0x00000000U /*!< Capture/Compare output polarity */ @@ -622,6 +638,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Output_Compare_N_Polarity TIM Complementary Output Compare Polarity + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_OCNPOLARITY_HIGH 0x00000000U /*!< Capture/Compare complementary output polarity */ @@ -631,6 +648,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Output_Compare_Idle_State TIM Output Compare Idle State + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_OCIDLESTATE_SET TIM_CR2_OIS1 /*!< Output Idle state: OCx=1 when MOE=0 */ @@ -640,6 +658,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Output_Compare_N_Idle_State TIM Complementary Output Compare Idle State + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_OCNIDLESTATE_SET TIM_CR2_OIS1N /*!< Complementary output Idle state: OCxN=1 when MOE=0 */ @@ -649,6 +668,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Input_Capture_Polarity TIM Input Capture Polarity + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_ICPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /*!< Capture triggered by rising edge on timer input */ @@ -659,6 +679,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Encoder_Input_Polarity TIM Encoder Input Polarity + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_ENCODERINPUTPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /*!< Encoder input with rising edge polarity */ @@ -668,6 +689,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Input_Capture_Selection TIM Input Capture Selection + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_ICSELECTION_DIRECTTI TIM_CCMR1_CC1S_0 /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to IC1, IC2, IC3 or IC4, respectively */ @@ -678,6 +700,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Input_Capture_Prescaler TIM Input Capture Prescaler + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_ICPSC_DIV1 0x00000000U /*!< Capture performed each time an edge is detected on the capture input */ @@ -689,6 +712,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_One_Pulse_Mode TIM One Pulse Mode + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_OPMODE_SINGLE TIM_CR1_OPM /*!< Counter stops counting at the next update event */ @@ -698,6 +722,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Encoder_Mode TIM Encoder Mode + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_ENCODERMODE_TI1 TIM_SMCR_SMS_0 /*!< Quadrature encoder mode 1, x2 mode, counts up/down on TI1FP1 edge depending on TI2FP2 level */ @@ -708,6 +733,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Interrupt_definition TIM interrupt Definition + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_IT_UPDATE TIM_DIER_UIE /*!< Update interrupt */ @@ -723,6 +749,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Commutation_Source TIM Commutation Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_COMMUTATION_TRGI TIM_CR2_CCUS /*!< When Capture/compare control bits are preloaded, they are updated by setting the COMG bit or when an rising edge occurs on trigger input */ @@ -732,6 +759,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_DMA_sources TIM DMA Sources + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_DMA_UPDATE TIM_DIER_UDE /*!< DMA request is triggered by the update event */ @@ -746,6 +774,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_CC_DMA_Request CCx DMA request selection + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_CCDMAREQUEST_CC 0x00000000U /*!< CCx DMA request sent when capture or compare match event occurs */ @@ -755,6 +784,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Flag_definition TIM Flag Definition + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_FLAG_UPDATE TIM_SR_UIF /*!< Update interrupt flag */ @@ -778,6 +808,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Channel TIM Channel + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_CHANNEL_1 0x00000000U /*!< Capture/compare channel 1 identifier */ @@ -792,6 +823,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Clock_Source TIM Clock Source + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_CLOCKSOURCE_INTERNAL TIM_SMCR_ETPS_0 /*!< Internal clock source */ @@ -814,6 +846,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Clock_Polarity TIM Clock Polarity + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_CLOCKPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /*!< Polarity for ETRx clock sources */ @@ -826,6 +859,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Clock_Prescaler TIM Clock Prescaler + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_CLOCKPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /*!< No prescaler is used */ @@ -837,6 +871,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_ClearInput_Polarity TIM Clear Input Polarity + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_CLEARINPUTPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /*!< Polarity for ETRx pin */ @@ -846,6 +881,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_ClearInput_Prescaler TIM Clear Input Prescaler + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_CLEARINPUTPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /*!< No prescaler is used */ @@ -857,6 +893,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_OSSR_Off_State_Selection_for_Run_mode_state TIM OSSR OffState Selection for Run mode state + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_OSSR_ENABLE TIM_BDTR_OSSR /*!< When inactive, OC/OCN outputs are enabled (still controlled by the timer) */ @@ -866,6 +903,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_OSSI_Off_State_Selection_for_Idle_mode_state TIM OSSI OffState Selection for Idle mode state + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_OSSI_ENABLE TIM_BDTR_OSSI /*!< When inactive, OC/OCN outputs are enabled (still controlled by the timer) */ @@ -874,6 +912,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to * @} */ /** @defgroup TIM_Lock_level TIM Lock level + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_LOCKLEVEL_OFF 0x00000000U /*!< LOCK OFF */ @@ -885,6 +924,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Break_Input_enable_disable TIM Break Input Enable + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_BREAK_ENABLE TIM_BDTR_BKE /*!< Break input BRK is enabled */ @@ -894,6 +934,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Break_Polarity TIM Break Input Polarity + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_BREAKPOLARITY_LOW 0x00000000U /*!< Break input BRK is active low */ @@ -904,6 +945,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to #if defined(TIM_BDTR_BKBID) /** @defgroup TIM_Break_Input_AF_Mode TIM Break Input Alternate Function Mode + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_BREAK_AFMODE_INPUT 0x00000000U /*!< Break input BRK in input mode */ @@ -914,6 +956,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to #endif /*TIM_BDTR_BKBID */ /** @defgroup TIM_Break2_Input_enable_disable TIM Break input 2 Enable + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_BREAK2_DISABLE 0x00000000U /*!< Break input BRK2 is disabled */ @@ -923,6 +966,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Break2_Polarity TIM Break Input 2 Polarity + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_BREAK2POLARITY_LOW 0x00000000U /*!< Break input BRK2 is active low */ @@ -933,6 +977,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to #if defined(TIM_BDTR_BKBID) /** @defgroup TIM_Break2_Input_AF_Mode TIM Break2 Input Alternate Function Mode + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_BREAK2_AFMODE_INPUT 0x00000000U /*!< Break2 input BRK2 in input mode */ @@ -943,6 +988,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to #endif /* TIM_BDTR_BKBID */ /** @defgroup TIM_AOE_Bit_Set_Reset TIM Automatic Output Enable + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_AUTOMATICOUTPUT_DISABLE 0x00000000U /*!< MOE can be set only by software */ @@ -952,6 +998,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Group_Channel5 TIM Group Channel 5 and Channel 1, 2 or 3 + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_GROUPCH5_NONE 0x00000000U /*!< No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC */ @@ -963,6 +1010,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Master_Mode_Selection TIM Master Mode Selection + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_TRGO_RESET 0x00000000U /*!< TIMx_EGR.UG bit is used as trigger output (TRGO) */ @@ -978,6 +1026,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Master_Mode_Selection_2 TIM Master Mode Selection 2 (TRGO2) + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_TRGO2_RESET 0x00000000U /*!< TIMx_EGR.UG bit is used as trigger output (TRGO2) */ @@ -1001,6 +1050,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Master_Slave_Mode TIM Master/Slave Mode + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_MASTERSLAVEMODE_ENABLE TIM_SMCR_MSM /*!< No action */ @@ -1010,6 +1060,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Slave_Mode TIM Slave mode + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_SLAVEMODE_DISABLE 0x00000000U /*!< Slave mode disabled */ @@ -1023,6 +1074,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Output_Compare_and_PWM_modes TIM Output Compare and PWM Modes + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_OCMODE_TIMING 0x00000000U /*!< Frozen */ @@ -1044,6 +1096,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Trigger_Selection TIM Trigger Selection + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_TS_ITR0 0x00000000U /*!< Internal Trigger 0 (ITR0) */ @@ -1070,6 +1123,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Trigger_Polarity TIM Trigger Polarity + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_TRIGGERPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /*!< Polarity for ETRx trigger sources */ @@ -1082,6 +1136,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Trigger_Prescaler TIM Trigger Prescaler + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_TRIGGERPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /*!< No prescaler is used */ @@ -1093,6 +1148,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_TI1_Selection TIM TI1 Input Selection + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_TI1SELECTION_CH1 0x00000000U /*!< The TIMx_CH1 pin is connected to TI1 input */ @@ -1102,6 +1158,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_DMA_Burst_Length TIM DMA Burst Length + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_DMABURSTLENGTH_1TRANSFER 0x00000000U /*!< The transfer is done to 1 register starting from TIMx_CR1 + TIMx_DCR.DBA */ @@ -1127,6 +1184,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup DMA_Handle_index TIM DMA Handle Index + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_DMA_ID_UPDATE ((uint16_t) 0x0000) /*!< Index of the DMA handle used for Update DMA requests */ @@ -1141,6 +1199,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup Channel_CC_State TIM Capture/Compare Channel State + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_CCx_ENABLE 0x00000001U /*!< Input or output channel is enabled */ @@ -1152,6 +1211,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to */ /** @defgroup TIM_Break_System TIM Break System + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define TIM_BREAK_SYSTEM_ECC SYSCFG_CFGR2_ECCL /*!< Enables and locks the ECC error signal with Break Input of TIM1/8/15/16/17 */ @@ -1169,6 +1229,7 @@ typedef void (*pTIM_CallbackTypeDef)(TIM_HandleTypeDef *htim); /*!< pointer to /* Exported macros -----------------------------------------------------------*/ /** @defgroup TIM_Exported_Macros TIM Exported Macros + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ @@ -1771,6 +1832,7 @@ mode. /* Private constants ---------------------------------------------------------*/ /** @defgroup TIM_Private_Constants TIM Private Constants + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ /* The counter of a timer instance is disabled only if all the CCx and CCxN @@ -1784,6 +1846,7 @@ mode. /* Private macros ------------------------------------------------------------*/ /** @defgroup TIM_Private_Macros TIM Private Macros + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ #define IS_TIM_CLEARINPUT_SOURCE(__MODE__) (((__MODE__) == TIM_CLEARINPUTSOURCE_NONE) || \ @@ -2333,6 +2396,7 @@ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim); */ /** @defgroup TIM_Exported_Functions_Group8 TIM Peripheral Control functions + * @ingroup RTEMSBSPsARMSTM32H7 * @brief Peripheral Control functions * @{ */ @@ -2371,6 +2435,7 @@ uint32_t HAL_TIM_ReadCapturedValue(const TIM_HandleTypeDef *htim, uint32_t Chann */ /** @defgroup TIM_Exported_Functions_Group9 TIM Callbacks functions + * @ingroup RTEMSBSPsARMSTM32H7 * @brief TIM Callbacks functions * @{ */ @@ -2398,6 +2463,7 @@ HAL_StatusTypeDef HAL_TIM_UnRegisterCallback(TIM_HandleTypeDef *htim, HAL_TIM_Ca */ /** @defgroup TIM_Exported_Functions_Group10 TIM Peripheral State functions + * @ingroup RTEMSBSPsARMSTM32H7 * @brief Peripheral State functions * @{ */ @@ -2424,6 +2490,7 @@ HAL_TIM_DMABurstStateTypeDef HAL_TIM_DMABurstState(const TIM_HandleTypeDef *htim /* Private functions----------------------------------------------------------*/ /** @defgroup TIM_Private_Functions TIM Private Functions + * @ingroup RTEMSBSPsARMSTM32H7 * @{ */ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure); 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