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Diffstat (limited to 'bsps/arm/stm32h7/include/stm32h7xx_ll_rcc.h')
-rw-r--r--bsps/arm/stm32h7/include/stm32h7xx_ll_rcc.h98
1 files changed, 98 insertions, 0 deletions
diff --git a/bsps/arm/stm32h7/include/stm32h7xx_ll_rcc.h b/bsps/arm/stm32h7/include/stm32h7xx_ll_rcc.h
index 418c52a39e..7c633215b7 100644
--- a/bsps/arm/stm32h7/include/stm32h7xx_ll_rcc.h
+++ b/bsps/arm/stm32h7/include/stm32h7xx_ll_rcc.h
@@ -34,12 +34,14 @@ extern "C" {
#if defined(RCC)
/** @defgroup RCC_LL RCC
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/** @defgroup RCC_LL_Private_Variables RCC Private Variables
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
extern const uint8_t LL_RCC_PrescTable[16];
@@ -50,6 +52,7 @@ extern const uint8_t LL_RCC_PrescTable[16];
/* Private constants ---------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/
/** @defgroup RCC_LL_Private_Macros RCC Private Macros
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if !defined(UNUSED)
@@ -99,10 +102,12 @@ extern const uint8_t LL_RCC_PrescTable[16];
/* Exported types ------------------------------------------------------------*/
#if defined(USE_FULL_LL_DRIVER) || defined(__rtems__)
/** @defgroup RCC_LL_Exported_Types RCC Exported Types
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
/** @defgroup LL_ES_CLOCK_FREQ Clocks Frequency Structure
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -142,10 +147,12 @@ typedef struct
/* Exported constants --------------------------------------------------------*/
/** @defgroup RCC_LL_Exported_Constants RCC Exported Constants
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
/** @defgroup RCC_LL_EC_OSC_VALUES Oscillator Values adaptation
+ * @ingroup RTEMSBSPsARMSTM32H7
* @brief Defines used to adapt values of different oscillators
* @note These values could be modified in the user environment according to
* HW set-up.
@@ -188,6 +195,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_HSIDIV HSI oscillator divider
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_RCC_HSI_DIV1 RCC_CR_HSIDIV_1
@@ -199,6 +207,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_LSEDRIVE LSE oscillator drive capability
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_RCC_LSEDRIVE_LOW (uint32_t)(0x00000000U)
@@ -210,6 +219,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_SYS_CLKSOURCE System clock switch
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_RCC_SYS_CLKSOURCE_HSI RCC_CFGR_SW_HSI
@@ -221,6 +231,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_SYS_CLKSOURCE_STATUS System clock switch status
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_RCC_SYS_CLKSOURCE_STATUS_HSI RCC_CFGR_SWS_HSI /*!< HSI used as system clock */
@@ -232,6 +243,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_SYSWAKEUP_CLKSOURCE System wakeup clock source
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_RCC_SYSWAKEUP_CLKSOURCE_HSI (uint32_t)(0x00000000U)
@@ -241,6 +253,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_KERWAKEUP_CLKSOURCE Kernel wakeup clock source
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_RCC_KERWAKEUP_CLKSOURCE_HSI (uint32_t)(0x00000000U)
@@ -250,6 +263,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_SYSCLK_DIV System prescaler
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D1CFGR_D1CPRE_DIV1)
@@ -278,6 +292,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_AHB_DIV AHB prescaler
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D1CFGR_HPRE_DIV1)
@@ -306,6 +321,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_APB1_DIV APB low-speed prescaler (APB1)
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D2CFGR_D2PPRE1_DIV1)
@@ -326,6 +342,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_APB2_DIV APB low-speed prescaler (APB2)
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D2CFGR_D2PPRE2_DIV1)
@@ -346,6 +363,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_APB3_DIV APB low-speed prescaler (APB3)
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D1CFGR_D1PPRE_DIV1)
@@ -366,6 +384,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_APB4_DIV APB low-speed prescaler (APB4)
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D3CFGR_D3PPRE_DIV1)
@@ -386,6 +405,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_MCOxSOURCE MCO source selection
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_RCC_MCO1SOURCE_HSI (uint32_t)((RCC_CFGR_MCO1>>16U) | 0x00000000U)
@@ -404,6 +424,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_MCOx_DIV MCO prescaler
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_RCC_MCO1_DIV_1 (uint32_t)((RCC_CFGR_MCO1PRE>>16U) | RCC_CFGR_MCO1PRE_0)
@@ -442,6 +463,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_RTC_HSEDIV HSE prescaler for RTC clock
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_RCC_RTC_NOCLOCK (uint32_t)(0x00000000U)
@@ -512,6 +534,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_USARTx_CLKSOURCE Peripheral USART clock source selection
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D2CCIP2R_USART16SEL)
@@ -579,6 +602,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_LPUARTx_CLKSOURCE Peripheral LPUART clock source selection
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D3CCIPR_LPUART1SEL)
@@ -601,6 +625,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_I2Cx_CLKSOURCE Peripheral I2C clock source selection
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined (RCC_D2CCIP2R_I2C123SEL)
@@ -647,6 +672,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_LPTIMx_CLKSOURCE Peripheral LPTIM clock source selection
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D2CCIP2R_LPTIM1SEL)
@@ -706,6 +732,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_SAIx_CLKSOURCE Peripheral SAI clock source selection
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D2CCIP1R_SAI1SEL)
@@ -769,6 +796,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_SDMMC_CLKSOURCE Peripheral SDMMC clock source selection
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D1CCIPR_SDMMCSEL)
@@ -783,6 +811,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_RNG_CLKSOURCE Peripheral RNG clock source selection
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D2CCIP2R_RNGSEL)
@@ -801,6 +830,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_USB_CLKSOURCE Peripheral USB clock source selection
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D2CCIP2R_USBSEL)
@@ -819,6 +849,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_CEC_CLKSOURCE Peripheral CEC clock source selection
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D2CCIP2R_CECSEL)
@@ -836,6 +867,7 @@ typedef struct
#if defined(DSI)
/** @defgroup RCC_LL_EC_DSI_CLKSOURCE Peripheral DSI clock source selection
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_RCC_DSI_CLKSOURCE_PHY (0x00000000U)
@@ -846,6 +878,7 @@ typedef struct
#endif /* DSI */
/** @defgroup RCC_LL_EC_DFSDM_CLKSOURCE Peripheral DFSDM clock source selection
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D2CCIP1R_DFSDM1SEL)
@@ -861,6 +894,7 @@ typedef struct
#if defined(DFSDM2_BASE)
/** @defgroup RCC_LL_EC_DFSDM2_CLKSOURCE Peripheral DFSDM2 clock source selection
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_RCC_DFSDM2_CLKSOURCE_PCLK4 (0x00000000U)
@@ -871,6 +905,7 @@ typedef struct
#endif /* DFSDM2_BASE */
/** @defgroup RCC_LL_EC_FMC_CLKSOURCE Peripheral FMC clock source selection
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D1CCIPR_FMCSEL)
@@ -890,6 +925,7 @@ typedef struct
#if defined(QUADSPI)
/** @defgroup RCC_LL_EC_QSPI_CLKSOURCE Peripheral QSPI clock source selection
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_RCC_QSPI_CLKSOURCE_HCLK (0x00000000U)
@@ -904,6 +940,7 @@ typedef struct
#if defined(OCTOSPI1) || defined(OCTOSPI2)
/** @defgroup RCC_LL_EC_OSPI_CLKSOURCE Peripheral OSPI clock source selection
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D1CCIPR_OCTOSPISEL)
@@ -924,6 +961,7 @@ typedef struct
/** @defgroup RCC_LL_EC_CLKP_CLKSOURCE Peripheral CLKP clock source selection
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D1CCIPR_CKPERSEL)
@@ -940,6 +978,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_SPIx_CLKSOURCE Peripheral SPI clock source selection
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D2CCIP1R_SPI123SEL)
@@ -991,6 +1030,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_SPDIF_CLKSOURCE Peripheral SPDIF clock source selection
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D2CCIP1R_SPDIFSEL)
@@ -1010,6 +1050,7 @@ typedef struct
#if defined(FDCAN1) || defined(FDCAN2)
/** @defgroup RCC_LL_EC_FDCAN_CLKSOURCE Peripheral FDCAN clock source selection
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D2CCIP1R_FDCANSEL)
@@ -1027,6 +1068,7 @@ typedef struct
#endif /*FDCAN1 || FDCAN2*/
/** @defgroup RCC_LL_EC_SWP_CLKSOURCE Peripheral SWP clock source selection
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D2CCIP1R_SWPSEL)
@@ -1041,6 +1083,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_ADC_CLKSOURCE Peripheral ADC clock source selection
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D3CCIPR_ADCSEL)
@@ -1057,6 +1100,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_USARTx Peripheral USART get clock source
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined (RCC_D2CCIP2R_USART16SEL)
@@ -1080,6 +1124,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_LPUARTx Peripheral LPUART get clock source
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D3CCIPR_LPUART1SEL)
@@ -1092,6 +1137,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_I2Cx Peripheral I2C get clock source
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D2CCIP2R_I2C123SEL)
@@ -1117,6 +1163,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_LPTIMx Peripheral LPTIM get clock source
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D2CCIP2R_LPTIM1SEL)
@@ -1140,6 +1187,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_SAIx Peripheral SAI get clock source
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D2CCIP1R_SAI1SEL)
@@ -1167,6 +1215,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_SDMMC Peripheral SDMMC get clock source
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D1CCIPR_SDMMCSEL)
@@ -1179,6 +1228,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_RNG Peripheral RNG get clock source
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if (RCC_D2CCIP2R_RNGSEL)
@@ -1191,6 +1241,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_USB Peripheral USB get clock source
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if (RCC_D2CCIP2R_USBSEL)
@@ -1203,6 +1254,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_CEC Peripheral CEC get clock source
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if (RCC_D2CCIP2R_CECSEL)
@@ -1216,6 +1268,7 @@ typedef struct
#if defined(DSI)
/** @defgroup RCC_LL_EC_DSI Peripheral DSI get clock source
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_RCC_DSI_CLKSOURCE RCC_D1CCIPR_DSISEL
@@ -1225,6 +1278,7 @@ typedef struct
#endif /* DSI */
/** @defgroup RCC_LL_EC_DFSDM Peripheral DFSDM get clock source
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D2CCIP1R_DFSDM1SEL)
@@ -1238,6 +1292,7 @@ typedef struct
#if defined(DFSDM2_BASE)
/** @defgroup RCC_LL_EC_DFSDM2 Peripheral DFSDM2 get clock source
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_RCC_DFSDM2_CLKSOURCE RCC_SRDCCIPR_DFSDM2SEL
@@ -1249,6 +1304,7 @@ typedef struct
/** @defgroup RCC_LL_EC_FMC Peripheral FMC get clock source
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D1CCIPR_FMCSEL)
@@ -1262,6 +1318,7 @@ typedef struct
#if defined(QUADSPI)
/** @defgroup RCC_LL_EC_QSPI Peripheral QSPI get clock source
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_RCC_QSPI_CLKSOURCE RCC_D1CCIPR_QSPISEL
@@ -1272,6 +1329,7 @@ typedef struct
#if defined(OCTOSPI1) || defined(OCTOSPI2)
/** @defgroup RCC_LL_EC_OSPI Peripheral OSPI get clock source
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_CDCCIPR_OCTOSPISEL)
@@ -1285,6 +1343,7 @@ typedef struct
#endif /* OCTOSPI1 || OCTOSPI2 */
/** @defgroup RCC_LL_EC_CLKP Peripheral CLKP get clock source
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D1CCIPR_CKPERSEL)
@@ -1297,6 +1356,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_SPIx Peripheral SPI get clock source
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D2CCIP1R_SPI123SEL)
@@ -1319,6 +1379,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_SPDIF Peripheral SPDIF get clock source
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D2CCIP1R_SPDIFSEL)
@@ -1332,6 +1393,7 @@ typedef struct
#if defined(FDCAN1) || defined(FDCAN2)
/** @defgroup RCC_LL_EC_FDCAN Peripheral FDCAN get clock source
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D2CCIP1R_FDCANSEL)
@@ -1345,6 +1407,7 @@ typedef struct
#endif /*FDCAN1 || FDCAN2*/
/** @defgroup RCC_LL_EC_SWP Peripheral SWP get clock source
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D2CCIP1R_SWPSEL)
@@ -1357,6 +1420,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_ADC Peripheral ADC get clock source
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_D3CCIPR_ADCSEL)
@@ -1369,6 +1433,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_RTC_CLKSOURCE RTC clock source selection
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_RCC_RTC_CLKSOURCE_NONE (uint32_t)(0x00000000U)
@@ -1380,6 +1445,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_TIM_CLKPRESCALER Timers clocks prescalers selection
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_RCC_TIM_PRESCALER_TWICE (uint32_t)(0x00000000U)
@@ -1390,6 +1456,7 @@ typedef struct
#if defined(HRTIM1)
/** @defgroup RCC_LL_EC_HRTIM_CLKSOURCE High Resolution Timers clock selection
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_RCC_HRTIM_CLKSOURCE_TIM (uint32_t)(0x00000000U) /* HRTIM Clock source is same as other timers */
@@ -1400,6 +1467,7 @@ typedef struct
#endif /* HRTIM1 */
/** @defgroup RCC_LL_EC_PLLSOURCE All PLLs entry clock source
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_RCC_PLLSOURCE_HSI RCC_PLLCKSELR_PLLSRC_HSI
@@ -1411,6 +1479,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_PLLINPUTRANGE All PLLs input range
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_RCC_PLLINPUTRANGE_1_2 (uint32_t)(0x00000000U)
@@ -1422,6 +1491,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EC_PLLVCORANGE All PLLs VCO range
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_RCC_PLLVCORANGE_WIDE (uint32_t)(0x00000000U) /* VCO output range: 192 to 836 MHz OR 128 to 544 MHz (*) */
@@ -1437,10 +1507,12 @@ typedef struct
/* Exported macro ------------------------------------------------------------*/
/** @defgroup RCC_LL_Exported_Macros RCC Exported Macros
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
/** @defgroup RCC_LL_EM_WRITE_READ Common Write and read registers Macros
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -1463,6 +1535,7 @@ typedef struct
*/
/** @defgroup RCC_LL_EM_CALC_FREQ Calculate frequencies
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -1582,6 +1655,7 @@ typedef struct
#if defined(USE_FULL_LL_DRIVER) || defined(__rtems__)
/** @defgroup RCC_LL_EC_PERIPH_FREQUENCY Peripheral clock frequency
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#define LL_RCC_PERIPH_FREQUENCY_NO 0x00000000U /*!< No clock enabled for the peripheral */
@@ -1597,10 +1671,12 @@ typedef struct
/* Exported functions --------------------------------------------------------*/
/** @defgroup RCC_LL_Exported_Functions RCC Exported Functions
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
/** @defgroup RCC_LL_EF_HSE HSE
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -1693,6 +1769,7 @@ __STATIC_INLINE uint32_t LL_RCC_HSE_IsReady(void)
*/
/** @defgroup RCC_LL_EF_HSI HSI
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -1852,6 +1929,7 @@ __STATIC_INLINE uint32_t LL_RCC_HSI_GetCalibTrimming(void)
*/
/** @defgroup RCC_LL_EF_CSI CSI
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -1985,6 +2063,7 @@ __STATIC_INLINE uint32_t LL_RCC_CSI_GetCalibTrimming(void)
*/
/** @defgroup RCC_LL_EF_HSI48 HSI48
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -2036,6 +2115,7 @@ __STATIC_INLINE uint32_t LL_RCC_HSI48_GetCalibration(void)
#if defined(RCC_CR_D1CKRDY)
/** @defgroup RCC_LL_EF_D1CLK D1CKREADY
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -2055,6 +2135,7 @@ __STATIC_INLINE uint32_t LL_RCC_D1CK_IsReady(void)
#else
/** @defgroup RCC_LL_EF_CPUCLK CPUCKREADY
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -2077,6 +2158,7 @@ __STATIC_INLINE uint32_t LL_RCC_CPUCK_IsReady(void)
#if defined(RCC_CR_D2CKRDY)
/** @defgroup RCC_LL_EF_D2CLK D2CKREADY
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -2095,6 +2177,7 @@ __STATIC_INLINE uint32_t LL_RCC_D2CK_IsReady(void)
#else
/** @defgroup RCC_LL_EF_CDCLK CDCKREADY
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -2114,6 +2197,7 @@ __STATIC_INLINE uint32_t LL_RCC_CDCK_IsReady(void)
#endif /* RCC_CR_D2CKRDY */
/** @defgroup RCC_LL_EF_SYSTEM_WIDE_RESET RESET
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
#if defined(RCC_GCR_WW1RSC)
@@ -2166,6 +2250,7 @@ __STATIC_INLINE uint32_t LL_RCC_WWDG2_IsSystemReset(void)
#if defined(DUAL_CORE)
/** @defgroup RCC_LL_EF_BOOT_CPU CPU
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -2215,6 +2300,7 @@ __STATIC_INLINE uint32_t LL_RCC_IsCM7BootForced(void)
#endif /*DUAL_CORE*/
/** @defgroup RCC_LL_EF_LSE LSE
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -2351,6 +2437,7 @@ __STATIC_INLINE uint32_t LL_RCC_LSE_IsReady(void)
*/
/** @defgroup RCC_LL_EF_LSI LSI
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -2389,6 +2476,7 @@ __STATIC_INLINE uint32_t LL_RCC_LSI_IsReady(void)
*/
/** @defgroup RCC_LL_EF_System System
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -2726,6 +2814,7 @@ __STATIC_INLINE uint32_t LL_RCC_GetAPB4Prescaler(void)
*/
/** @defgroup RCC_LL_EF_MCO MCO
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -2790,6 +2879,7 @@ __STATIC_INLINE void LL_RCC_ConfigMCO(uint32_t MCOxSource, uint32_t MCOxPrescale
*/
/** @defgroup RCC_LL_EF_Peripheral_Clock_Source Peripheral Clock Source
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -3971,6 +4061,7 @@ __STATIC_INLINE uint32_t LL_RCC_GetADCClockSource(uint32_t Periph)
*/
/** @defgroup RCC_LL_EF_RTC RTC
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -4212,6 +4303,7 @@ __STATIC_INLINE uint32_t LL_RCC_GetRTC_HSEPrescaler(void)
*/
/** @defgroup RCC_LL_EF_TIM_CLOCK_PRESCALER TIM
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -4246,6 +4338,7 @@ __STATIC_INLINE uint32_t LL_RCC_GetTIMPrescaler(void)
#if defined(HRTIM1)
/** @defgroup RCC_LL_EF_HRTIM_SET_CLOCK_SOURCE HRTIM
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -4281,6 +4374,7 @@ __STATIC_INLINE uint32_t LL_RCC_GetHRTIMClockSource(void)
#endif /* HRTIM1 */
/** @defgroup RCC_LL_EF_PLL PLL
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -5259,6 +5353,7 @@ __STATIC_INLINE void LL_RCC_PLL3_SetFRACN(uint32_t FRACN)
/** @defgroup RCC_LL_EF_FLAG_Management FLAG Management
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -6021,6 +6116,7 @@ __STATIC_INLINE void LL_C2_RCC_ClearResetFlags(void)
*/
/** @defgroup RCC_LL_EF_IT_Management IT Management
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
@@ -6329,6 +6425,7 @@ __STATIC_INLINE uint32_t LL_RCC_IsEnableIT_LSECSS(void)
#if defined(USE_FULL_LL_DRIVER) || defined(__rtems__)
/** @defgroup RCC_LL_EF_Init De-initialization function
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
void LL_RCC_DeInit(void);
@@ -6337,6 +6434,7 @@ void LL_RCC_DeInit(void);
*/
/** @defgroup RCC_LL_EF_Get_Freq Get system and peripherals clocks frequency functions
+ * @ingroup RTEMSBSPsARMSTM32H7
* @{
*/
uint32_t LL_RCC_CalcPLLClockFreq(uint32_t PLLInputFreq, uint32_t M, uint32_t N, uint32_t FRACN, uint32_t PQR);
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-20 12:40:28 +0000